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CoreControl TM
Data Sheet
TDA21102
High speed Driver with bootstrapping for dual Power MOSFETs
Features * * * * * * * * * *
P-DSO-8-7
P-DSO-14-3
Fast rise and fall times for frequencies up to 2 MHz Capable of sinking more than 4 A peak current for lowest switching losses Charges the High Side and Low Side MOSFETs gate to 6..12 V according to PVCC setting. Adjustable High Side and Low Side MOSFET gate drive voltage via PVCC pin for optimizing ON losses and gate drive losses Integrates the bootstrap diode for reducing the part count Prevents from cross-conducting by adaptive gate drive control High voltage rating on Phase node Supports shut-down mode for very low quiescent current through three-state input Compatible to standard PWM controller ICs (Intersil, Analog Devices) Floating High Side MOSFET drive * Ideal for multi-phase Desktop CPU supplies on motherboards and VRMs Package Marking P-DSO-14-3 21102
Number 1 2 3 4 5 6 7
Type TDA21102
Ordering Code Q67042-S4244
Name PWM1 PWM2 GND GATELS1 PVCC PGND GATELS2 PHASE2 GATEHS2 BOOT2 Description Input for the PWM1 controller signal Input for the PWM2 controller signal Ground Gate drive output for the N-Channel Low Side MOSFET 1. Input to adjust the High Side gate drive Power ground return for the Low Side Drivers Gate drive output for the N-Channel Low Side MOSFET 2. To be connected to the junction of the High Side and the Low Side MOSFET 2 Gate drive output for the N-Channel High Side MOSFET 2. Floating bootstrap pin. To be connected to the external bootstrap capacitor to generate the gate drive voltage for the High Side N-Channel MOSFET 2. Floating bootstrap pin. To be connected to the external bootstrap capacitor to generate the gate drive voltage for the High Side N-Channel MOSFET 1. Gate drive output for the N-Channel High Side MOSFET 1. To be connected to the junction of the High Side and the Low Side MOSFET 1 Supply Voltage
Pinout
Top View
PWM1 PWM2 GND GATELS1 PVCC PGND GATELS2 VCC PHASE1 GATGATEHS1 BOOT1 BOOT2 GATEHS2 PHASE2
8 9 10
11
BOOT1
12 13 14
GATEHS1 PHASE1 VCC
Rev. 1.0
Page 1
Dec 19, 2003
CoreControl TM
General Description
Data Sheet
TDA21102
The dual high speed driver is designed to drive a wide range of N-Channel low side and N-Channel high side MOSFETs with varying gate charges. It has a small propagation delay from input to output, short rise and fall times and the same pin configuration as the HIP6602B. In addition it provides several protection features as well as a shut down mode for efficiency reasons. The high breakdown voltage makes it suitable for mobile applications. Target application The dual high speed driver is designed to work well in half-bridge type circuits where dual N-Channel MOSFETs are utilized. A circuit designer can fully take advantage of the drivers capabilities in high-efficiency, high-density synchronous DC/DC converters that operate at high switching frequencies, e.g. in multi-phase converters for CPU supplies on motherboards and VRMs but also in motor drive and class-D amplifier type applications. Block Diagram
PVCC HS Driver BOOT GATEHS
PHASE PWM
Control Logic
Shoot Through Protection
LS Driver
GATELS
VCC
GND
PVCC HS Driver
BOOT GATEHS
Bias
PHASE PWM
Control Logic
Shoot Through Protection
LS Driver
GATELS GND
Rev. 1.0
Page 2
Dec 19, 2003
CoreControl TM
Absolute Maximum Ratings
At Tj = 25 C, unless otherwise specified
Data Sheet
TDA21102
Parameter Voltage supplied to `VCC' pin Voltage supplied to `PVCC' pin Voltage supplied to `PWM' pin Voltage supplied to `BOOT' pin referenced to `PHASE' Voltage rating at `PHASE' pin, DC Voltage rating at `PHASE' pin, tpulse_max =500ns Max Duty Cycle = 2% Junction temperature Storage temperature ESD Rating; Human Body Model IEC climatic category; DIN EN 60068-1 Thermal Characteristic Parameter Thermal resistance, junction-case Thermal resistance, junction-ambient Electrical Characteristic
At Tj = 25 C, unless otherwise specified
Symbol VVCC VPVCC VPWM VBOOT - VPHASE VPHASE TJ TS
Value Unit Min. Max. -0.3 -0.3 -0.3 -0.3 -1 -20 -25 -55 25 25 5.5 25 25 30 C kV V
150 150 4 55/150/56
Symbol Rth-JC Rth-JA
Values Unit Min. Typ. Max. 44,7 K/W 116,2
Parameter Supply Characteristic Bias supply current Quiescent current Power supply current
Symbol IVCC IVCCQ IPVCC
Conditions f = 1 MHz, NO LOAD VPVCC = VVCC = 12 V 1.8 V VPWM 3.0 V f = 1 MHz, NO LOAD VPVCC = VVCC = 12 V VVCC rising threshold VVCC falling threshold V_PWM = 0.4 V V_PWM = 4.5 V t_SHUT > 320 ns 1.7 V VPWM 3.1 V
Unit Values Min. Typ. Max. 0.95 0.75 26 9.7 7.3 -80 120 1.7 100 1.8 10.1 7.6 115 180 230 2.0 10.5 8.0 -150 250 3.1 350 2.2
Dec 19, 2003
1.65 3 mA
Under-voltage lockout Under-voltage lockout Input Characteristic Current in `PWM' pin IPWM_L Current in `PWM' pin IPWM_H Shut down window VIN_SHUT Shut down hold-off t_SHUT time PWM pin open VPWM_O
Rev. 1.0
V V A V ns
Page 3
CoreControl TM
PWM Low level threshold (falling) PWM High level threshold (rising) Pulse Width High Side VPWM_L VPWM_H t_p
Data Sheet
1.45
TDA21102
1.55 V 3.45 3.6 ns
= Pulse with on PWM pin
40
At Tj = 25 C, unless otherwise specified
Dynamic Characteristic Turn-on propagation td(ON)_HS Delay High Side* Turn-off propagation td(OFF)_HS delay High Side Rise time High Side tr_HS Fall time High Side tf_HS Turn-on propagation td(ON)_LS Delay Low Side Turn-off propagation td(OFF)_LS delay Low Side Rise time Low Side tr_LS Fall time Low Side tf_LS
27 16 PPVCC = VVCC= 12 V CISS = 3000 pF 20 11 20 13 22 13
35 21 25 20 23 20 25 20 ns
Measurement Timing diagram PWM @ Td(ON)_H GATEHS @ 90% GATEHS @ 10% Td(Off)_LS Tr_HS PHASE @ 5V GATELS @ 90% GATELS @ 5V GATELS @ 10% Tf_LS
Rev. 1.0 Page 4 GATELS GATEHS
PWM @ Td(Off)_H
PWM
Tf_HS Td(On)_LS
PHASE
Tr_LS
Dec 19, 2003
CoreControl TM
Operating Conditions
At Tj = 25 C, unless otherwise specified
Data Sheet
TDA21102
Parameter Voltage supplied to `VCC' pin Voltage supplied to `PVCC' pin Input signal transition frequency Power dissipation Junction temperature
Symbol VVCC VPVCC f PTOT TJ
Conditions
Unit Values Min. Typ. Max. 10.8 6 0.1 13.2 13.2 2 0.9 -25 150 V V MHz W C
TA = 25 C, TJ = 125 C
At Tj = 25 C, unless otherwise specified
Unit Values Min. Typ. Max. Output Characteristic High Side (HS) and Low Side (LS), ensured by design Output HS; Source PPVCC = VVCC= 12 V 1.2 Resistance I_HS_SRC = 2 A HS; Sink PPVCC = VVCC= 12 V 1 1.5 LS; Source PPVCC = VVCC= 12 V 1 I_HS_SRC = 2 A LS; Sink PPVCC = VVCC= 12 V 1 1.3 HS; Source PPVCC = VVCC= 12 V 4 A Peak outputt_P_HS / Pulse < 20 ns HS; Sink 4 t_P_LS / Pulse < 40 ns current LS; Source 4 D_HS < 2%, D_LS < 4% 4 LS; Sink
Parameter
Conditions
Rev. 1.0
Page 5
Dec 19, 2003
CoreControl TM
Package Drawing P-DSO-14-3
Data Sheet
TDA21102
Layout Footprints
e 1,27 mm
Rev. 1.0
A 5,69 mm
Page 6
L 1,31 mm
B 0,65 mm
Dec 19, 2003
CoreControl TM
Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 53, D-81541 Munchen Infineon Technologies AG 1999 All Rights Reserved.
Data Sheet
TDA21102
Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
Page 7
Dec 19, 2003

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